Messages in this thread |  | | From | Keith Owens <> | Subject | Re: Topic for discussion: OS Design | Date | Fri, 27 Oct 2000 00:58:10 +1100 |
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On Thu, 26 Oct 2000 09:17:49 -0400 (EDT), "Richard B. Johnson" <root@chaos.analogic.com> wrote: >On Thu, 26 Oct 2000, Albert D. Cahalan wrote: >> I doubt this is true on most modern processors. On the Pentium >> and above, large pages are used for the kernel. The PowerPC port > ^^^^^^^^^^^ > >The page-size is determined by the architecture. They are 4096 bytes >in the pentium. /usr/include/asm/page.h PAGE_SHIFT = 12, PAGE_SIZE = >1 << PAGE_SHIFT.
ADC probably meant "large page tables" as opposed to "large pages". Instead of one page table entry per 4K page, Pentium supports PTEs for contiguous collections of pages, less activity on the page tables generally results in better performance.
>This shows that out of 34,678 bytes we needed, we wasted 6282, ~1.5 >pages. Since there are 5 modules, we waste about 1/3 page per module. > >So I don't, as you say; "... waste 1/2 page or more per module".
Statistics say that the average loss will be 1/2 page per module. Some will waste more, some will waste less, average is 1/2 the unit.
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