Messages in this thread |  | | Date | Sun, 22 Oct 2000 22:32:32 -0600 | From | "Jeff V. Merkey" <> | Subject | Re: Topic for discussion: OS Design |
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On Sun, Oct 22, 2000 at 09:56:52PM -0600, Dwayne C . Litzenberger wrote: > [snip] > > crossing memory protection domains is slow, there's no way around > > it (except better hardware). > > So what we really need to do is get some custom "RAM blitter" into our > hardware to do the memory copies needed for fast context switching and message > passing. > > Too bad nobody on this list works at an electronics design company... ;-P
Dwayne,
Why don't you get with the C++ guy on the list talking about C++ kernels, Eray Ozkural (erayo@cs.bilkent.edu.tr) and the two of you design a processor that's optimized to run C++ with 0 overhead memory protection (3 clocks max to go through a ring 3 -> 0 gate). Who knows? Maybe you could design a new processor for us to use that just implements two super RISC instructions, 'set bugs off' and 'do what I'm thinking'.
:-)
Jeff
> > -- > Dwayne C. Litzenberger - dlitz@dlitz.net > > - Please always Cc to me when replying to me on the lists. > - Please have the courtesy to respond to any requests or questions I may have. > - See the mail headers for GPG/advertising/homepage information.
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