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SubjectRe: large memory support for x86


On Fri, 13 Oct 2000, Timur Tabi wrote:

> ** Reply to message from Alexander Viro <viro@math.psu.edu> on Fri, 13 Oct 2000
> 15:25:31 -0400 (EDT)
>
>
> > Ditto with PAE: 16:32->32->36.
> > In _all_ cases you are limited by the size of linear address. I.e. all
> > address modes are limited to 4Gb. All you can get from PAE is placing of
> > these 4Gb in 64Gb of physical memory.
>
> Then how are you supposed to access all 64GB of RAM in your machine? The
> kernel must be able to access all 64GB of RAM at once, otherwise it can't do
> proper memory management.

Kernel doesn't have to access it all at once. Most of the time it doesn't
care about the contents of most pages. It certainly needs some permanently
mapped stuff, but it's _way_ less than the full memory. The rest is mapped
and unmapped on demand. That's what kmap() and kunmap() do.

Moreover, 4.4BSD derivatives never bothered mapping the whole physical
memory in kernel space, even on 386. It's more complex than what we used
to do, but it's doable quite fine. There is no need to keep the whole
memory mapped by the kernel.

> I've been reading on the PAE in Intel's manuals. I admit, some of it is over
> my head. I was under the impression that it was 16:32->64->36 with PAE enabled.

Nope. 16:32->32->36. Paging is _after_ the 32-bit bottleneck. You'ld have
to change segment descriptors format to expand it.

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