[lkml]   [2000]   [Oct]   [13]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
SubjectRe: Updated 2.4 TODO List - more on PCI resources...]
On Fri, Oct 13, 2000 at 02:22:32PM -0700, Dunlap, Randy wrote:
> I'm not familiar with yenta controllers/devices,
> and I'm not trying to throw you a tasty red herring,
> but...
> yenta_config_init() does
> config_writeb(socket, PCI_CACHE_LINE_SIZE, 32);
> Is this writing to the CardBus bridge or to the device's
> CacheLineSize register?

It is writing to the bridge. I think it should probably actually be
L1_CACHE_BYTES/4. I am not sure about the impact of an incorrect
setting. Maybe Linus knows.

-- Dave
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to
Please read the FAQ at

 \ /
  Last update: 2005-03-22 12:41    [W:0.040 / U:0.024 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site