Messages in this thread | | | Date | Tue, 17 Aug 1999 10:10:05 +1000 | From | Paul Mackerras <> | Subject | Re: New resources - pls, explain :-( |
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Jes Sorensen <Jes.Sorensen@cern.ch> wrote:
> I am not sure I understand this right, are you referring to I/O port > accesses like ISA/PCI I/O as opposed to shared memory mappings?
Yes of course, insl etc. have an I/O port argument.
> If this is the case I don't see the value of this as I am still to see > hardware that takes byte swapping into account when accessed via I/O > ports.
It is actually completely orthogonal whether the hardware does the byte swapping or not.
The point is that bytes, and arrays of bytes, don't have endianness. Larger quantities do. If you are transferring arrays of bytes, you don't want any byte swapping. If you are transferring 16 or 32 bit integers from a little-endian I/O port to registers or memory on a big-endian machine, you do need byte swapping.
So just saying on a page-by-page basis whether you want byte swapping or not isn't enough.
Anyway, I did a grep through the kernel sources and found 0 cases where insw/outsw/insl/outsl were being used to transfer an array of 16-bit or 32-bit integers. In the vast majority of cases, they were being used to transfer arrays of bytes. There were a couple of cases where they were being used to transfer an aggregate structure such as an ethernet header.
Which would tend to suggest that these macros shouldn't byte-swap on big-endian platforms.
Paul.
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