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    SubjectRe: New resources - pls, explain :-(
    Alan Cox wrote:
    > > Remember, readl() and friends are to be used for PCI mapped memory only! If you
    > > want to generalize, accesses have to be done through e.g. device->readl().

    > readl() is for all busses.

    So is this "the standard"? It would be nice if I could make this
    assumption in the future.


    > If you wnt a PCI bus specific readl it should be called pci_readl(). Perhaps
    > thats the root of the problem. Define pci_readl() to be strictly ordered,
    > do the right byte swapping and be done with it. Define readl() to change
    > no order.

    Ah, wouldn't it be nice... Has anyone talked about making a concrete
    decision on this issue?

    I like rth's suggestion about having bus-specific ioremap() instead of a
    generic one; then all readl() etc. would go through that, and do "the
    right thing" for that bus. One could add "bigendian_writel()" and
    "littleendian_writel()" to satisfy the Linus constraint of making
    unusual usage of writel() obvious.

    Regards,

    Jeff




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