lkml.org 
[lkml]   [1999]   [Aug]   [12]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: SMP Scheduling
Horst von Brand,

I am currently building a 4 processor xeon system, each processor
containing 2 megs of L2 cache. I am going to use this for pseudo
realtime image processing. I spent a lot of money for the 2 meg caches
in the hopes that it would keep the main memory from becoming the system
bottleneck.

If the processes are allowed to rotate, I anticipate that each cache
will have to be refreshed. 2 megabytes of data swapped 4 times seems
like a lot of overhead to me. What am I missing?

I hope to have the machine up in a week. If anybody wants to perform
affinity experiments I would be happy to make them an account. Currently
I am still waiting for my heatsinks and memory:-(

thanks
don
--
-------------------------------------------------------------------
| Don Fisher dfisher@as.arizona.edu |
| MMT Observatory VOICE: (520)621-7647 |
| University of Arizona FAX: (520)670-5740 |
| Tucson, AZ 85721 |
-------------------------------------------------------------------

-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.rutgers.edu
Please read the FAQ at http://www.tux.org/lkml/

\
 
 \ /
  Last update: 2005-03-22 13:53    [W:0.098 / U:0.060 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site