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    SubjectRe: Oops assist...
    On May 10, Richard B. Johnson wrote:

    > On Mon, 10 May 1999, Stephen C. Tweedie wrote:
    >
    > > Hi,
    > >
    > > On Thu, 6 May 1999 10:54:21 -0700 (PDT), Dan Hollis
    > > <goemon@sasami.anime.net> said:
    > >
    > > >> at least on cold power-on you first have to write something to RAM
    > > >> to initialize the parity bit(s). if you try to read RAM first,
    > > >> odds are 50% that the parity bit is wrong and you'll get an NMI...
    >
    > You don't really have to clear memory, i.e., write to it. All you
    > have to do is read all of it with NMI disabled.
    >
    > Write 0x80 to port 0x70 to disable NMI, enable later by writing 0
    > out the same port (it's the index register for the CMOS clock-chip).
    > Since a read or write takes about the same time, it is usual to
    > just write all memory to zeros, but it is not necessary.

    why should reading memory update/set parity or ECC data ?

    updating parity/ecc information can't happen for sure for every read because of
    performance reasons. are there special bus/memory cycles if ecc/parity fails ?
    I don't believe (at least for 8088/186/... this did _not_ happen).


    >
    > >
    > > > Are you 100% sure about this? And what about warmboots.
    > >
    > > It is necessary to initialise ECC memory, yes, but the BIOS should do it
    > > for you. I've only got one ECC box, but at least on that one the BIOS
    > > definitely spends a while setting up the memory at boot time.
    > >
    >
    >
    > Cheers,
    > Dick Johnson
    > ***** FILE SYSTEM WAS MODIFIED *****
    > Penguin : Linux version 2.2.6 on an i686 machine (400.59 BogoMips).
    > Warning : It's hard to remain at the trailing edge of technology.
    >


    Harald
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    Harald Koenig, \/\/\/\/\/\/\/\/\/
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    koenig@tat.physik.uni-tuebingen.de ^^^^^ ^^^^^

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