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SubjectRe: [patch] __volatile__ needed in get_cycles()?

On Tue, 30 Mar 1999, Gabriel Paubert wrote:

> I disagree, do not forget that a bus locked transaction just does this: it
> goes to the bus and performs a Read-Modify-Write operation which requires
> a) arbitration for bus ownership and b) several bus clocks to perform the
> operation. With CPU to bus clock ratios around 5 these days, this is tens
> of CPU clocks as a minimum and is very dependant on current bus
> utilization (snoop cache writebacks, other CPUs and PCI bridge
> transactions). I would think that the following in a _single_ asm:

mb() does locked instructions:

#define mb() __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory")

and this is very well on purpose. On SMP this gets optimized on the level
of the L2 cache. (if the touched cacheline is owned by the CPU then no bus
cycles happen) On UP you are right, most systems will use the LOCK signal
to do the memory modification.

to have 'exact' get_cycles() we need both the compiler-level barrier, and
both a pre- and post- rdtsc bus-level barrier, because both preceding and
succeeding instructions can be reordered with rdtsc:

--- linux/include/asm-i386/timex.h.orig2 Tue Mar 30 10:50:09 1999
+++ linux/include/asm-i386/timex.h Tue Mar 30 10:50:49 1999
@@ -39,7 +39,9 @@
#else
unsigned long eax, edx;

+ mb();
__asm__ __volatile__("rdtsc":"=a" (eax), "=d" (edx));
+ mb();
return eax;
#endif
}
but this is an overkill for most purposes.

-- mingo


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