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    SubjectRe: spin_unlock optimization(i386)
    Date
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    > >The only thing you need is to make sure there is a store in "spin_unlock()",
    >
    > So we could reimplement a rmb() (and in turn an mb()) that scales in SMP?
    > Something like:
    >
    > #define rmb() ... "movb $0, ZERO_PAGE+32*smp_processor_id()"
    >
    > This because the spin_unlock really is:
    >
    > mb();
    > spin_lock.lock = 0;
    >
    > If spin_unlock() doesn't need the lock, mb() doesn't need the lock
    > on the bus either.

    No. Any aligned store (which you get from the compiler) will be atomic
    even in an SMP system.

    > Am I missing something?

    I don't think so.

    What do you want the memory barrier for other than to prevent reads
    from crossing the unlock? (apologies if I missed this in an earlier
    message)

    Erich Boleyn
    PMD IA32 Architecture
    Intel



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