lkml.org 
[lkml]   [1999]   [Oct]   [17]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: Buggy HLT instruction in Cyrix M2 or error in ATAPI CDROM code ?
On Sun, Oct 17, 1999 at 11:25:02AM -0400, laredo@gnu.org wrote:
> > > So IMHO there's nothing wrong with my IDE interface.
> >
> > If it isnt running at 33Mhz it isnt running to spec.
>
> It can run at 25MHz and still be running to spec. Also at 30MHz.
> With a 75MHz fsb on a p5 system, 25MHz is very possibly the
> resulting pci clock on some motherboards.

Motherboards without the means to drive FSB and PCI with different
clocks (most older motherboards sold before faster CPUs came out)
simply make PCI clock = 1/2 FSB clock. If FSB is at 75MHz then PCI is
at 37.5MHz and overclocked.

I haven't heard of motherboards creating PCI clock from FSB with a
modifiable divisor. Either PCI clock depends on FSB or is driven
separately at 33MHz.

--
Andreas E. Bombe <andreas.bombe@munich.netsurf.de>
http://home.pages.de/~andreas.bombe/
RSA 0x886663c9 30 EC 09 73 84 7B 55 83 C4 7A 91 D9 9D C5 4B B0
DSA 0x04880A44 72E5 7031 4414 2EB6 F6B4 4CBD 1181 7032 0488 0A44

-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.rutgers.edu
Please read the FAQ at http://www.tux.org/lkml/

\
 
 \ /
  Last update: 2005-03-22 13:54    [W:0.054 / U:0.600 seconds]
©2003-2018 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site