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SubjectRe: Xe(n)on Re: buil yer own mb.
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>>>>> "Alex" == Alexander Kjeldaas <astor@guardian.no> writes:
Alex> costly (more transistors). In a CPU, the L1 cache normally has the
Alex> highest associativity, the L2 has a lower associativity, and the L3
Alex> has the lowest. The reason is that an L3 cache will be much larger
Alex> than the other caches so there will be less collisions, and since it
Alex> is very large, you save more $$ by making the design cheaper. This

Well, `normally' is in the eye of the beholder.
There is also a good reason to have lower associativity for L1: associativity
makes caches a little slower. This slow down is lost in the noise for L2 and
up, but is not negligible for L1.


Stefan

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