Messages in this thread | | | Date | Sun, 6 Sep 1998 12:05:49 -0500 (CDT) | From | Andy Higgins <> | Subject | Re: New MTRR fix for 2.1.120-pre3 |
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> > > > On Fri, 4 Sep 1998, Richard Gooch wrote: > > > > > > > > > No, it's not quite this simple. Some BIOSes don't set the MTRRs the > same for all CPUs, so the existing MTRR support fixes this during the > bootup sequence. Having different MTRRs can cause problems later. > So the safe option for SMP machines is to enable CONFIG_MTRR. > > My recent patch should only affect the bootup code, preventing general > MTRR manipulation before the system is ready. I don't know how it > could fix things post-boot. > Let me just clarify what I mean by "post-boot": I mean after you see > the "Freeing unused kernel memory: #k freed" message. > Problem solved, my BIOS was setting both the Network Card and SCSI card to IRQ9. Doing a cat /proc/interrupts showed that CPU0 was doing all the network and scsi work. With IOAPIC support in my BIOS there doesn't seem to be the options to force the use of not the use of certain IRQs and I was assuming incorrectly (I assume) for a while that PCI would take care of the IRQ assignments and sharing a single IRQ was technically ok, but I guess not when combined with SMP..
So I just moved the cards..physically until I got them to use different IRQs..now cat /proc/interrupts shows perfect balancing:
CPU0 CPU1 0: 1483711 1486538 IO-APIC-edge timer 1: 1560 1615 IO-APIC-edge keyboard 2: 0 0 XT-PIC cascade 8: 0 0 IO-APIC-edge rtc 13: 1 0 XT-PIC fpu 14: 5 3 IO-APIC-edge ide0 16: 342158 342749 IO-APIC-level BusLogic BT-958 19: 3372295 3371574 IO-APIC-level eth0 NMI: 0 IPI: 0
With CONFIG_MTRR enabled now I can't hardly get the load to go over 2 or 3..where it would shoot upt to the 20's before under half the load.. without CONFIG_MTRR the load creeps up pretty high 9-10's..(must be that buggy SMP BIOS thing)
Thanks for the help, the performance I'm getting now with 2.1.120 is phenomenal..never seen anything even near it.
Andy
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