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SubjectRe: 64 bit PCI and Linux
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>>>>> "David" == David S Miller <davem@dm.cobaltmicro.com> writes:

David> Well in the sparc64/PCI case I have one of two solutions to fix
David> this particular issue for 32-bit PCI devices, either I can:

David> 1) Use bounce buffers for physical buffers in >4GB range

David> or I can

David> 2) Reserve a spot in the lower 32-bit range of IOMMU mappings
David> for all transfers, and set them up dynamically as needed.

[snip]

David> This IOMMU thing is actually a "feature". It allows 32-bit PCI
David> devices to DMA to any 64-bit physical address. It also allows
David> for multiple PCI busses, and to have their address mappings not
David> conflict with those of any other PCI controller's busses.

I personally think solution 2) is kinda nifty, we could then implement
some DMA mapping functions like pci_map_bus() and pci_unmap_bus() and
let these be dummy functions on architectures who do not know how to
deal with it and 32 bits archs. It will definately make it easier for
the individual driver programmers.

David> So you are half-right, half-wrong. I think the Alpha is in a
David> somewhat different state about these issues, perhaps Richard
David> can comment.

Hmmm I remember seeing something about the Alpha on this but I can't
remember any details I must admit ... anybody got an OSF/1 kernel
programmers manual or something like that?

Out of curiosity, how does the Sparc64 PCI controllers deal with
32-bit cards that supports 64-bit PCI transactions? (I got some of
those ;-)

Jes

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