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SubjectRe: 2.1.115 and Cyrix detection
Rafael Reilova <> wrote:
> First of all, what chip do you have?

I have a Cyrix 6x86MX PR200+, though I have to clock it down to about
180 MHz in order for the system to remain stable (still working on that

The CPU was detected properly on 2.0.33 with a patch (the one with all
the nifty VSPM and IDLE_HLT stuff in it). Unfortunately I don't have a
copy of my /proc/cpuinfo from that time.

> It seems there is some glitch with 686(L) detection due to a mistake
> in the setCx86() macro. People reported getting correct detection
> when compiling the kernel for 486, but non-detection when compiled as
> 586/686.

That is the case here; I'm building with CONFIG_M686=y.

> The current Cyrix code follows Cyrix's CPU detection algorithm to the
> letter, so I'll be very interested in any misdetections, but please report
> the chip model you have, kernel version, a copy of /proc/cpuinfo, and the
> CPU line in the boot messages ;-)


processor : 0
cpu family : 4
model : unknown
vendor_id : unknown
stepping : unknown
fdiv_bug : no
hlt_bug : no
sep_bug : no
f00f_bug : no
fpu : yes
fpu_exception : yes
cpuid level : -1
wp : yes
flags :
bogomips : 149.50

From dmesg:
Linux version 2.1.115 (root@fuzzy) (cc version 2.7.2) #6 SMP Mon Aug 10 17:20:28 CDT 1998
mapped APIC to ffffe000 (00213000)
mapped IOAPIC to ffffd000 (00214000)
Console: colour VGA+ 132x43
Calibrating delay loop... 149.50 BogoMIPS
Memory: 63244k/65536k available (768k kernel code, 400k reserved, 1068k data, 56k init)
Checking if this processor honours the WP bit even in supervisor mode... Ok.
POSIX conformance testing by UNIFIX
CPU0: 486
SMP motherboard not detected. Using dummy APIC emulation.
Checking 386/387 coupling... OK, FPU using exception 16 error reporting.
Checking 'hlt' instruction... OK.

I'll try to boot my 2.0 kernel and post the information that it gives me
in /proc/cpuinfo.

-- (Fuzzy Fox) || "Her lips said 'No,' but her
sometimes known as David DeSimone || eyes said 'Read my lips!'" ||

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