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SubjectRe: Device xx:xx not found by BIOS
Attached is the output of lspci -vvx.
Incidentally I think there is something funny about my motherboard supporting
PCI 2.0
and the permedia card stating it requires 2.01... BIOS is PHOENX.
Hope this is of some use.

Thanks
David Bryant

Martin Mares wrote:

> Hi,
>
> > During boot up I get the following messages. These messages only
> > appear in the 2.1.x series, they don't
> > come up in the 2.0.x series:
>
> - Which kernel do you use?
>
> - Please send me output of 'lspci -vvx' and all PCI-related bootup
> messages.
>
> Have a nice fortnight
> --
> Martin `MJ' Mares <mj@ucw.cz> http://atrey.karlin.mff.cuni.cz/~mj/
> Faculty of Math and Physics, Charles University, Prague, Czech Rep., Earth
> "return(ECRAY); /* Program exited before being run */"
>
> -
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.rutgers.edu
> Please read the FAQ at http://www.altern.org/andrebalsa/doc/lkml-faq.html
>
00:00.0 Class 0600: 8086:04a3 (rev 11)
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=slow >TAbort- <TAbort- <MAbort+ >SERR- <PERR-
Latency: 96 set
00: 86 80 a3 04 06 01 00 24 11 00 00 06 00 60 00 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:02.0 Class 0000: 8086:0484 (rev 03)
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 0 set
00: 86 80 84 04 0f 00 00 02 03 00 00 00 00 00 00 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:03.0 Class 0101: 1095:0640 (rev 01)
Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Interrupt: pin A routed to IRQ 14
Region 0: I/O ports at 01f0
Region 1: I/O ports at 03f4
Region 2: I/O ports at ff00
Region 3: I/O ports at ff08
00: 95 10 40 06 01 00 00 02 01 00 01 01 00 00 00 00
10: f1 01 00 00 f5 03 00 00 01 ff 00 00 09 ff 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 0e 01 00 00

00:0e.0 Class 0200: 10ec:8029
Subsystem: 10ec:8029
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Interrupt: pin A routed to IRQ 9
Region 0: I/O ports at fce0
00: ec 10 29 80 03 00 00 02 00 00 00 02 00 00 00 00
10: e1 fc 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 ec 10 29 80
30: 00 00 00 00 00 00 00 00 00 00 00 00 09 01 00 00

00:0f.0 Class 0380: 104c:3d07 (rev 01)
Subsystem: 1092:0148
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 192 min, 192 max, 96 set
Interrupt: pin A routed to IRQ 9
Region 0: Memory at 40000000 (32-bit, non-prefetchable)
Region 1: Memory at 40800000 (32-bit, non-prefetchable)
Region 2: Memory at 41000000 (32-bit, non-prefetchable)
00: 4c 10 07 3d 07 00 80 02 01 00 80 03 00 60 00 00
10: 00 00 00 40 00 00 80 40 00 00 00 41 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 92 10 48 01
30: 00 00 00 20 00 00 00 00 00 00 00 00 09 01 c0 c0

00:10.0 Class 0000: 0000:2000 (rev ff) (prog-if 14)
Subsystem: 14ff:0000
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop+ ParErr+ Stepping+ SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 20 set, cache line size ff
Interrupt: pin T routed to IRQ 9
00: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
10: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
20: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
30: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00

00:11.0 Class 0000: 0000:2000 (rev ff) (prog-if 14)
Subsystem: 14ff:0000
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop+ ParErr+ Stepping+ SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 20 set, cache line size ff
Interrupt: pin T routed to IRQ 9
00: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
10: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
20: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
30: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00

00:12.0 Class 0000: 0000:2000 (rev ff) (prog-if 14)
Subsystem: 14ff:0000
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop+ ParErr+ Stepping+ SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 20 set, cache line size ff
Interrupt: pin T routed to IRQ 9
00: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
10: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
20: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
30: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00

00:13.0 Class 0000: 0000:2000 (rev ff) (prog-if 14)
Subsystem: 14ff:0000
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop+ ParErr+ Stepping+ SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 20 set, cache line size ff
Interrupt: pin T routed to IRQ 9
00: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
10: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
20: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
30: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00

00:14.0 Class 0000: 0000:2000 (rev ff) (prog-if 14)
Subsystem: 14ff:0000
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop+ ParErr+ Stepping+ SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 20 set, cache line size ff
Interrupt: pin T routed to IRQ 9
00: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
10: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
20: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
30: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00

00:15.0 Class 0000: 0000:2000 (rev ff) (prog-if 14)
Subsystem: 14ff:0000
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop+ ParErr+ Stepping+ SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 20 set, cache line size ff
Interrupt: pin T routed to IRQ 9
00: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
10: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
20: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
30: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00

00:16.0 Class 0000: 0000:2000 (rev ff) (prog-if 14)
Subsystem: 14ff:0000
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop+ ParErr+ Stepping+ SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 20 set, cache line size ff
Interrupt: pin T routed to IRQ 9
00: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
10: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
20: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
30: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00

00:17.0 Class 0000: 0000:2000 (rev ff) (prog-if 14)
Subsystem: 14ff:0000
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop+ ParErr+ Stepping+ SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 20 set, cache line size ff
Interrupt: pin T routed to IRQ 9
00: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
10: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
20: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
30: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00

00:18.0 Class 0000: 0000:2000 (rev ff) (prog-if 14)
Subsystem: 14ff:0000
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop+ ParErr+ Stepping+ SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 20 set, cache line size ff
Interrupt: pin T routed to IRQ 9
00: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
10: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
20: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
30: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00

00:19.0 Class 0000: 0000:2000 (rev ff) (prog-if 14)
Subsystem: 14ff:0000
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop+ ParErr+ Stepping+ SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 20 set, cache line size ff
Interrupt: pin T routed to IRQ 9
00: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
10: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
20: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
30: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00

00:1a.0 Class 0000: 0000:2000 (rev ff) (prog-if 14)
Subsystem: 14ff:0000
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop+ ParErr+ Stepping+ SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 20 set, cache line size ff
Interrupt: pin T routed to IRQ 9
00: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
10: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
20: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
30: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00

00:1b.0 Class 0000: 0000:2000 (rev ff) (prog-if 14)
Subsystem: 14ff:0000
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop+ ParErr+ Stepping+ SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 20 set, cache line size ff
Interrupt: pin T routed to IRQ 9
00: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
10: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
20: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
30: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00

00:1c.0 Class 0000: 0000:2000 (rev ff) (prog-if 14)
Subsystem: 14ff:0000
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop+ ParErr+ Stepping+ SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 20 set, cache line size ff
Interrupt: pin T routed to IRQ 9
00: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
10: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
20: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
30: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00

00:1d.0 Class 0000: 0000:2000 (rev ff) (prog-if 14)
Subsystem: 14ff:0000
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop+ ParErr+ Stepping+ SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 20 set, cache line size ff
Interrupt: pin T routed to IRQ 9
00: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
10: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
20: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
30: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00

00:1e.0 Class 0000: 0000:2000 (rev ff) (prog-if 14)
Subsystem: 14ff:0000
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop+ ParErr+ Stepping+ SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 20 set, cache line size ff
Interrupt: pin T routed to IRQ 9
00: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
10: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
20: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
30: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00

00:1f.0 Class 0000: 0000:2000 (rev ff) (prog-if 14)
Subsystem: 14ff:0000
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop+ ParErr+ Stepping+ SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 20 set, cache line size ff
Interrupt: pin T routed to IRQ 9
00: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
10: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
20: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00
30: ff 14 00 00 ff 14 00 00 ff 14 00 00 ff 14 00 00

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