Messages in this thread | | | Date | Mon, 20 Jul 1998 04:18:08 +0100 | From | Jamie Lokier <> | Subject | Task switching, current pointer & GDT ideas |
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How about this combination of a few ideas I've seen in the "current pointer suggestions" thread. I'll start with the feature list :-)
* Removes limit of 8192 (or so) tasks. * Smaller per-task kernel stacks again. * No space used for I/O bitmap normally. * Full I/O bitmap (all ports) on demand (also applies to EVM86 bitmap). * Faster task switching (probably). * Save ~64k because preallocated GDT not required.
And here's the architecture I'm suggesting (x86 only). I may be wrong on a few technical points about what is possible, but I don't think so:
- One per-CPU ring 0 stack for interrupts and perhaps bottom halves. - A kernel stack per task for non-interrupt context. - No TSS structure and associated bitmaps (!). - No GDT entry per task (!). - A globally shared TSS with no bitmaps (maybe needs to be per CPU, and see also below, not all tasks use this). Plus either: - A GDT entry per CPU, changed on task switch when required if changing to/from non-default TSS, two per CPU if double buffering is required. (See below about non-default TSSs). - Another GDT entry per CPU for LDT, also changed on task switch. or: - GDT entries allocated as needed for LDTs and non-default TSSs. This would require a 64k preallocated GDT again, it implies a resource limit (that will probably never be reached though). This may make task switching faster or not, depends on cache behaviour. And I should add: - per CPU GDT entries are kept in separate cache areas obviously... - it might even make sense to group all variables used in standard syscall & interrupt paths together (these GDT entries, bh_mask, bh_active, need_resched etc.) to avoid L1 cache line conflicts.
Now that task switch is explicit code, each task has:
- no x86 TSS per task any more. - a context structure like the TSS but containing only the necessary context, and ordered for fast task switching/access to important structure members. - The structure contains a pointer to an optional TSS if the task uses I/O or enhanced VM86 bitmaps, or to the globally shared "empty" TSS. - If a task needs an I/O bitmap, one is allocated along with a non-default TSS to contain it. - Similarly if a task needs an enhanced VM86 bitmap, a non-default TSS is required. - Other stuff rarely used (the debug registers, MSR registers?) can be left out of the normal structure, and pointed to, perhaps again just requiring a non-default TSS if these are used.
As this task context doesn't include an I/O bitmap or some other stuff, it is smaller. Also per-task kernel stacks aren't used for interrupts or bottom halves, so it may be possible to shrink the per-task stack size to a single page again.
The various proposed ways to reimplement `current' are still worth exploring (fixed address & TLB tricks, processor id at base of stack etc.), or the current scheme can continue to be used.
This is a big overhaul and I see a lot of rebooting in the coding. Any comments? I wouldn't be surprised if mingo's already implemented and debugged it :-)
-- Jamie
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