lkml.org 
[lkml]   [1998]   [Apr]   [25]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: faster strcpy()
On Fri, Apr 24, 1998 at 03:18:05PM -0400, Richard B. Johnson wrote:
> On Fri, 24 Apr 1998, Alexander Kjeldaas wrote:
>
> > On Fri, Apr 24, 1998 at 11:49:05AM -0400, Richard B. Johnson wrote:
> > >
> > > Directly using the built-in Intel macros such as:
> > >
> > > rep movsb
> > > rep movsw
> > > rep movslw
> > > .... etc
> > >
> > > is not the most efficient way unless the strings are very short. Using
> > > cache-aligned long-word instructions in which register operations can
> > > occur at the same time memory accesses are happening, will be most
> > > efficient..
> > >
> > > The new glibc "knows" about this stuff. Also the kernel code "knows"
> > > about this stuff.
> > >
> >
> > But this isn't true on all processors. It is true on the pentium, but
> > probably not on the pentium pro/II. On the pentium pro, rep movsl is
> > highly optimized microcode. It takes over the whole microarchitecture
> > and utilizes all possible instruction units (that's why you can't run
> > other instructions in parallell with a 'rep' instruction on a pentium
> > pro). I haven't checked this, but take Andy Glew's word for it :-).
> >
> > astor
> >
>
> Other instructions in 'parallel' ?. Any parallel instructions are
> transparent to the instruction-stream. The fact that auto increment.
> auto decrement, auto count, and branch prediction may be occurring
> makes no difference to the code written for it. It just 'sometimes'
> makes it faster. The Intel processors are not like DSPs where you
> can partition instruction streams to run in parallel. You get whatever
> the CPU gives you.
>

When your processor have many instruction units, you can often run
several instructions in parallel. You want to use your knowledge about
the timing and number of execution units to maximize the parallelism
or your program to get the best possible performance.

On most CPUs, you have complex instructions such as division or square
root. On RISCs and on Pentium Pro, you can dispatch a division
instruction and the processor will execute other instructions while
one execution unit is busy doing the divide. What I was saying as a
side note above, is that 'rep' instructions don't have this property
on pentium pros. They are implemented using microcode which takes over
all execution units so no other instructions will be executed,
speculatively or not, until the 'rep' instruction has completed.

The people designing the pentium pro did this to be able to make 'rep
movs' execute as fast as possible, faster than an equivalent set of
inlined 'mov' instructions. This was not done for the pentium which as
a much simpler "RISC"-like internal design.

astor

--
Alexander Kjeldaas, Guardian Networks AS, Trondheim, Norway
http://www.guardian.no/

-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.rutgers.edu

\
 
 \ /
  Last update: 2005-03-22 13:42    [W:0.121 / U:1.116 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site