Messages in this thread | | | Date | Thu, 12 Feb 1998 19:00:41 +0100 (CET) | From | MOLNAR Ingo <> | Subject | Re: TLB entries > 4kb |
| |
On Thu, 12 Feb 1998, Alan Cox wrote:
> > Has anybody ever looked into implementing that? What architectures besides > > MIPS could take advantage of such a feature? > > On the intel its a huge win to map PCI frame buffers using 4Mbyte pages, but > the kernel mmap really can't hack the idea right now. A pity cos if you > hack it in and make sure you never unmap it you get 2-3% better X performance
i tried to hack this half a year ago, but had to find out that 4MB pages are only valid for kernel mappings, which means we'd have to make X a ring 0 process too ...
-- mingo
- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.rutgers.edu
| |