Messages in this thread | | | Date | Mon, 14 Dec 1998 18:41:02 +0000 (GMT) | From | Riley Williams <> | Subject | Re: [PATCH] i386 entry.S alignment tweak |
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Hi Jamie.
>> I remember seeing some assembly that had the following sequence in >> the middle thereof (not for gcc but you can probably decode it):
>> LOCK >> SEG ES >> MOV DI,DI
>> The first time I read through that, I wondered what on earth it >> was supposed to do, and only later did I realise it was >> effectively a rather verbose NOP instruction...
> Not just verbose, but very very slow on any of the modern > processors. Multiple nops would probably be faster :-)
True, but I suspect the slowness was intentional...here's the full sequence, copied straight from the relevant source file...and no, there aren't any comments in the source at all, so I've no idea what the original programmer's intention was...
MOV CX,-1 MOV BX,CX
L1: LOCK SEG ES MOV DI,DI LOCK SEG ES MOV SI,SI LOCK SEG ES MOV DI,DI LOCK SEG ES MOV SI,SI LOCK SEG ES MOV DI,DI LOCK SEG ES MOV SI,SI LOCK SEG ES MOV DI,DI SUB CX,-1 JNZ L1
That looks like a delay loop to me, and one that's been padded out to a particular length as well...
> GAS generates this for the same length:
> leal 0x0(%esi,1),%esi
Nodz...
Best wishes from Riley.
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