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SubjectRe: > 1GB physical on x86: Summary so far
Date
In article <33BC5B4D.B43233DD@chibacity.com>, fb  <fb@chibacity.com> wrote:
>hmm actually i thought i read somewhere that from i386 on a far 48-bit
>pointer could be used to address more than 4 gigs of memory in a
>segmented model

Nope.

The segmentation hardware still only translates addresses to 32-bit
"linear addresses", and as such you cannot use segments to address more
than 32-bits of address space.

[ Minor nit: even if you could, it wouldn't actually be 48 bits but 45:
the three low bits of the segment number are protection bits ]

Some intel advocates point out that you can use the "present" bit of
segments to make it apprear as if you had the full 45 bits worth of
addressing space (using swapping of segments the same way you'd use the
present bit in the page table), but they conveniently forget the fact
that that is actually not very usable - nor even a very good analogy (*)

So you should consider the x86 to be a purely 32-bit addressing mode
family, with some very strange details in some very strange places (the
segmentation is only one of the strange details: the "extended physical
address space" is another strange detail that intel added for the
supercomputer needs).

Linus

(*) With paging, you _can_ mark all the pages present and get at the
full 32 bits at the same time if you have enough memory without having
aliases. You cannot do the same with the 45-bit segmentation model.

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