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SubjectRe: ISA bus and SLOW_DOWN_IO
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"Richard B. Johnson" <root@analogic.com> writes:

[... nice history lesson deleted ...]

> Port addresses above 0xffff
> appear ONLY on the PCI bus. This allows one to use port I/O and still
> keep the high-speed signals off the ISA bus.

Maybe I just haven't been keeping up with the times, but how do you
generate a port address above 0xffff? As of the 486 at least, it
couldn't be done since only "dx" and not "edx" supplies the address --
or is that not correctly documented? (More history -- on the Z80 I
believe you could access 64k of ports by putting the address in BC and
using the "out (c)" or whatever form of I/O instruction -- it actually
used BC and not just C as the address).

> Now, using the "old fashoned" pause method of:
>
> jmp foo
> foo:
>
> Is not too effective because with high-speed CPUs and built-in caches,
> you will not waste enough time.

More history: the idea was not only to waste time, but to cause a bus
access by forcing the prefetch queue to be reloaded. The 486 got
smart about jumps whose target was in the queue and would not reload
the queue, hence the exorbitantly long cycle counts for the I/O
instructions to create a delay. The slowness of I/O is why the high
end video cards introduced in the 486 era switched to memory mapping.

> However, accessing RAM is predictable
> because PC class RAM access times will not get much faster than 60 ns.
>
> I suggest that the macro be changed to:
>
> pusha
> popa
>
> This will access the stack with a known number of processor clocks plus
> read/write access time. These accesses are not on the ISA bus.

The read/write access time is fairly unknown, as you just pointed out.

I'm surprised people still make crap that needs these BS workarounds.
It should have gone out 16 years ago.

Tom.

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