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SubjectRe: SMP update: 2.1.30 & eth0: Tx error

> test bleeding-edge stuff. I haven't yet much looked into the impact of
> the new code on uni-processor machines, but I'd certainly appreciate
> comments and potential patches for UP-related issues too...

On UP boxes, it happily runs bottom half handlers while in an interrupt,
which has caused the "eth0: Tx request while ISR is active" messages.
The following two line patch fixes that problem. Looks like a simple
thinko-typo. You can decide if the atomic ops are really required or
just overkill :)



--- linux/arch/i386/kernel/irq.c.orig Fri Mar 28 14:37:06 1997
+++ linux/arch/i386/kernel/irq.c Fri Mar 28 14:37:10 1997
@@ -485,8 +485,8 @@


-#define irq_enter(cpu, irq) do { } while (0)
-#define irq_exit(cpu, irq) do { } while (0)
+#define irq_enter(cpu, irq) atomic_inc(&intr_count)
+#define irq_exit(cpu, irq) atomic_dec(&intr_count)


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