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SubjectRe: Mmap device performance
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>>>>> "ralf" == ralf  <ralf@uni-koblenz.de> writes:

ralf> I'll have to add a syscall cachectl() make the caching of a
ralf> memory area controlable for MIPS. Will that one also be useful
ralf> for Intel (or other architectures)?

I can see the potential use for this for the m68k port. Currently we
set the caching inside the kernel on the frame buffer memory, but who
knows we might need it in userland at some point. We also have a
sys_cacheflush() in order for the glibc trampoline stuff to work.

Jes

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