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SubjectRe: 2.1.63 - testing Pentium bug workaround..
Even with the fix, the PTE for the first page of the IDT has to be in
the TLB, otherwise we're right back in the same boat, right? (i.e. the
CPU would have to read the PTE from memory...)

If the above is true, then do we have the possibility for a race
condition? If not, I'd love to see an explanation. Am I missing
something?

thanks,

todd.

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