Messages in this thread |  | | From | "Andrew E. Mileski" <> | Subject | Re: wrong information about cache size in linux/Configure.help | Date | Mon, 2 Sep 1996 16:46:03 -0400 (EDT) |
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> To whoever is responsible for this section in linux/Configure.help, as > of 2.0.16: > > Limit memory to low 16MB > CONFIG_MAX_16M > [..] > You also need at least 512kB of RAM cache if you have more than 64MB of RAM. > [..] > > As it is stated, this must be (and is) plain wrong. The amount of > cachable RAM depends on the chipset, cache organization, size of tag RAM > etc. (In the case of P6 systems with on-chip L2 cache, there's no way to > upgrade the cache ;) > > Could somebody with the proper knowledge change this, clarify it and/or > maybe add a file Help_my_computer_is_slow_after_upgrading_RAM :^), or a > hint to the FAQ.
Here is a copy of the message I posted to linux-smp recently...
============
The following info comes DIRECTLY off the Intel datasheets.
Intel Cacheable Supported Chipset RAM RAM ======= ========= ========= 430FX 64Mb 128Mb 430HX 512Mb* 512Mb 430MX 64Mb 128Mb 430VX 64Mb 128Mb 440FX 64Gb+ 1Gb 450GX 64Gb+ 4Gb 450KX 64Gb+ 512Mb
* The amount of cacheable memory depends on the amount of tag address RAM installed (8 bits = 64Mb, 9 bits = 128Mb, 10 bits = 256Mb, 11 bits = 512Mb).
+ Pentium Pro processors have an internal cache (it is a separate chip mounted next to the CPU chip in a dual cavity package), hence the chipset doesn't have anything to do with caching.
Some details on Intel products can be found on their web site at: http://www.intel.com/design/ Or can be found in the datasheets and manuals available from the Intel Literature Department.
- -- Andrew E. Mileski mailto:aem@ott.hookup.net http://www.redhat.com/~aem/ Linux Plug-and-Play Project Leader http://www.redhat.com/linux-info/pnp/ PGP public keys are available from http://www.redhat.com/~aem/pgp-keys.txt
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