lkml.org 
[lkml]   [1996]   [Aug]   [19]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: >64M RAM cache requirements?

This is why I just sold 32 of my 96 mb of EDO RAM.
Triton I only caches the first 64mb even with
512kb cache.

Joel

On Mon, 19 Aug 1996, Rob Riggs wrote:

> It came as quite a shock to me, but according to Intel's own
> documentation the Triton chipset cannot cache more than 64MB
> no matter how much cache RAM you have installed.
>
> Rob
> (rriggs@tesser.com)
>


\
 
 \ /
  Last update: 2005-03-22 13:37    [W:0.079 / U:2.060 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site