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SubjectRe: BAD CPU --> SIG11 (mine appears to be caused by cache)

I will receive a Tyan Tomcat I with 512K burst next week, and your
mail is indeed not a good news for me.

You are right to suspect the L2 cache.
However, if I will have the same problem, I'll try to check other
hardware components.

Is it possible with your set-up to increase memory access timing?
For example, set read (burst) timing to something like X-4-4-4/X-4-4-4,
write timing to X-4-4-4, and RAS to CAS delay to 2 or 3?
If your system works with such set-up values, it may be a memory problem.
Are you sure that you are using 60 ns SIMS ? (required for P166).

I think that it may be a heating problem too.
IMHO, we should use a fan that cools the whole motherboard with so fast
systems and never install peripheral devices close to the mother-board.

On Sat, 25 May 1996 wiegley@teamster.usc.edu wrote:

> Ok, so I too am having the same probalem with an Iwill motherboard
> (the P54TSW2 model with built-in AHA-2940UW) and P166 that I bought
> last weekend. I have never had a singal 11 error before and before I
> go shooting my mouth off to the dealer I did some testing as you all
> suggested...
>
> This board comes with a 512K pipelined burst cache soldered to the
> board. With the external cache turned on in the BIOS I can run
>
> #!/bin/sh
> for i in 0 1 2 3 4 ; do
> for j in 0 1 2 3 4 5 6 7 8 9 ; do
> make clean; make zImage >& log.$i$j
> done
> done
>
> and approx 1 out of every 4 'make zImage's fails with
>
> gcc: Internal compiler error: program cc1 got fatal signal 11

IMHO, if you must wait 4 kernel compilations in order to get SIG11, it
may be a heating problem.
(Or a flaw in some chipset. My first pentium had the FDIV flaw)

Gerard.


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