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SubjectRe: detecting > 64M on x86
> I know I've seen the formula posted here before, how is the RAM to Cache
> Ram computed?

256k of _DIRECT_MAPPED_ cache = 18 bits of address.
For 64MB (2^26) of memory you need: 26 - 18 = 8 bits of tag address RAM.

This _ONLY_ applies to direct mapped cache, which is the most common these
days (associative mapping is faster, but more expensive).

> Reason I wonder is I have 2 web servers and a news server with 64 meg and
> 512k of cache. Can I go to 128 meg on these?

You need tag address RAM. The problem is that not all chipsets or
motherboards allow it to be expanded.

Intel Cacheable Supported
Chipset RAM RAM
======= ========= =========
430FX 64Mb 128Mb
430HX 512Mb* 512Mb
430MX 64Mb 128Mb
430VX 64Mb 128Mb
440FX 64Gb+ 1Gb
450GX 64Gb+ 4Gb
450KX 64Gb+ 512Mb

* The amount of cacheable memory depends on the amount of tag address RAM
installed (8 bits = 64Mb, 9 bits = 128Mb, 10 bits = 256Mb, 11 bits = 512Mb).

+ Pentium Pro processors have an internal cache (it is a separate chip mounted
next to the CPU chip in a dual cavity package), hence the chipset doesn't
have anything to do with caching.

Andrew E. Mileski
Linux Plug-and-Play Kernel Project
XFree86 Matrox Team

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