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SubjectRe: driver development tool
In article <5661k1$> you wrote:
: > 2) access to PCB manufacturing
: > 10 pieces of a 4-layer PCB cost ~$1200 and need 4 weeks for
: > processing.

I have access to simple two-sided PCB manufacturing facilities. PCB
layout on the other hand is hard to come by...

: > 5) programming
: > The FPGA is really critical. Xilinx is probably the worst choice
: > for a free project, since you need their expensive, dongle-protected
: > tools. I'm now looking to other brands, exp. Altera/Lattice.
: > Not having free(cheap) programming tools means that programming
: > must be centralized, and this rapidly becomes frustrating on both
: > ends when something goes wrong.

FPGAs are very cool. I have experience with Altera and have facilities
to program some of their devices.

: > Current dream: a big FPGA connected to ALL the ISA pins, programmable
: > on the fly by the PC itself; a fast 32-bit micro with very fast comm
: > ports (ST20450) and a 32-bit bus with a standard 72-pin DRAM SIMM module
: > (4-16M); 4 RS-232 ports; USB (Universal Serial BUS) controller; MIDI...
: > Of course not all is needed by everyone, only the FPGA can be mounted
: > in a minimal version, and it can be a PGA, so no trouble soldering it.
: > You can easily implement any kind of UART in a reasonabily big chip.
: > Probable costs (for the user):
: > development and testing ... $0
: > FPGA ... $50-$100
: > PCB ... $1200/n_users
: > uP(20450) ... $40
: > uP(56000) ... $0
: > RAM ... see your local store/get from an old PC
: > Connectors, glue logic ... $10
: >
: > Any feedback?

Hmmm.. I just attempted a project like this for as my "Senior Design
Project." It failed miserably. Primary reasons: PCB layout software
is too expensive and possibly difficult to use (this may not be an
issue if you are sending it somewhere to have done), and designing a DRAM/bus
controller in an FPGA is a b*tch (really, its no picnic).

Also, an FPGA that is designed to interface with all of the sh*t (excuse
me) that have piled on that board is going take HOURS (and hours, and hours)
to design and test. This project would be difficult enough (IMHO) if
you just had a pile of 64kx8 DRAM chips and a simple dumb logic circuit.

Randy Scott <>

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