Messages in this thread Patch in this message |  | | Date | Thu, 31 Oct 1996 10:09:21 +0100 (MET) | From | Ingo Molnar <> | Subject | preliminary K5 anti divide by zero oops patch |
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Could ppl with an AMD K5 CPU try out this small arch/i386/kernel/time.c patch?
it worked on at least one machine :) It should prevent those ugly divide by zero kernel oopses.
[any feedback, both positive and negative is welcome!]
Ingo
[the following patch is against any recentish 2.0 kernel]
--- .time.c.original Wed Oct 23 16:37:36 1996 +++ time.c Thu Oct 31 10:04:20 1996 @@ -20,10 +20,13 @@ #include <linux/string.h> #include <linux/mm.h> #include <linux/interrupt.h> +#include <linux/time.h> +#include <linux/delay.h> #include <asm/segment.h> #include <asm/io.h> #include <asm/irq.h> +#include <asm/delay.h> #include <linux/mc146818rtc.h> #include <linux/timex.h> @@ -482,6 +485,7 @@ xtime.tv_sec = get_cmos_time(); xtime.tv_usec = 0; + printk("This is the K5 patch thingie.\n"); /* If we have the CPU hardware time counters, use them */ #ifndef CONFIG_APM /* Don't use them if a suspend/resume could @@ -489,6 +493,28 @@ needs more debugging. */ if (x86_capability & 16) { do_gettimeoffset = do_fast_gettimeoffset; + + printk("detecting Vendor: %s.\n", x86_vendor_id); + if( strcmp( x86_vendor_id, "AuthenticAMD" ) == 0 ) { + printk(" AMD detected.\n"); + printk(" detecting CPU: %d.\n",x86); + if( x86 == 5 ) { + printk(" K5 detected.\n"); + printk(" detecting model: %d.\n",x86_model); + if( x86_model == 0 ) { + printk(" Model 0 detected.\n"); + printk(" Tweaking cycle counter logic.\n"); + /* turn on cycle counters during power down */ + __asm__ __volatile__ (" movl $0x83, %%ecx \n \ + rdmsr \n \ + orl $1,%%eax \n \ + wrmsr \n " + : : : "ax", "cx", "dx" ); + udelay(500); + } + } + } + /* read Pentium cycle counter */ __asm__(".byte 0x0f,0x31" :"=a" (init_timer_cc.low),
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