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Messages in this thread Complete thread (EXPERIMENTAL) |
That's strange though. Somebody with knowledge of that HW (or specs) who
can spot something ? Could it be an issue with timing ?
I don't have HW access to this machine. If somebody could send one to me I could do more investigation. Ben, would an ssh access to such a machine and to a terminal server suffice? It says clearly in the code where to start. See the FIXME notes in both libata-sff and libata-core about MMIO. Neither the DMA transfer start or the probe SRST sequence are correct with MMIO posting and this hasn't been fixed as I pointed out was needed when I originally NAKked the change. Without those being fixed (especially SRST) on any device with heavy PCI posting of mmio your controller *wont work*. Alan | ||||||||||
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