lkml.org 
[lkml]   [2002]   [Dec]   [21]   [last100]   RSS-feed
Views: [more markup]  [less markup]  [headers]  [forward] 
 
Messages in this thread
Complete thread (EXPERIMENTAL)
/
DateSat, 21 Dec 2002 12:24:50 +0100 (CET)
FromIngo Molnar <>
SubjectRe: Intel P6 vs P7 system call performance
Digg This

On Tue, 17 Dec 2002, Linus Torvalds wrote:

How about this patch? Instead of making a per-cpu trampoline, write to the msr during each context switch.

I wanted to avoid slowing down the context switch, but I didn't actually time how much the MSR write hurts you (it needs to be conditional, though, I think).

this is the solution i took in the original vsyscall patches. The syscall entry cost is at least one factor more important than the context-switch cost. The MSR write was not all that slow when i measured it (it was on the range of 20 cycles), and it's definitely something the chip makers should keep fast.

Ingo

\
ISP Services
Valid XHTML 1.0!\ /
Valid CSS! Last update: 2005-03-22 12:31    [W:1.165 / U:0.380 seconds]
©2003-2005 Jasper Spaans