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Messages in this thread Complete thread (EXPERIMENTAL) |
Hi!
I believe someone (Jeff Garzik?) benchmarked gcc code
generation, and the C3 executed code scheduled for a 486 faster
than it did for -m586
I'm not sure about the alignment flags. I've been meaning to look into that myself... Interesting. I have no clue about which C3 you're talking about here but a VIA Ezra has all 686 instructions including cmov and thus optimising for PPro works best for me. Prolly I would have to do more benchmarking to find out about aligment advantages. I heard cmovs are microcoded in Centaurs. s...l...o...w... It still might be faster then a branch... or not if centaurs are really that simple. Pavel I did not measure it myself, but rumors were they took tens of cycles. Well, a IFcc prefix meaning 'execute next instruction if' would be way more cool that CMOVcc. Because I want CADDcc, CTESTcc, CBSWAPcc too ;) But since all 1 byte opcodes are taken and Jcc skip # <- 2 byte opcode opcode op1,op2 skip: I think some CPU magic can detect such short jumps and handle'em just like they were such a prefix, saving potential branch (mis-)prediction. -- vda | ||||||||||
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