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Subject[PATCH v2 3/3] ARM: dts: Modify I2C bus configuration
Date
Enable I2C bus 8 which is exposed on the IPMB_1 connector
on the X570D4U mainboard.

Additionally adds a descriptive comment to I2C busses 1 and 5.

Signed-off-by: Renze Nicolai <renze@rnplus.nl>
---
arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts | 7 +++++++
1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts
index 66318ef8caae..8dee4faa9e07 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts
@@ -162,6 +162,7 @@ &i2c0 {
};

&i2c1 {
+ /* Hardware monitoring SMBus */
status = "okay";

w83773g@4c {
@@ -219,6 +220,7 @@ i2c4mux0ch3: i2c@3 {
};

&i2c5 {
+ /* SMBus on BMC connector (BMC_SMB_1) */
status = "okay";
};

@@ -243,6 +245,11 @@ eth1_macaddress: macaddress@3f88 {
};
};

+&i2c8 {
+ /* SMBus on intelligent platform management bus header (IPMB_1) */
+ status = "okay";
+};
+
&gfx {
status = "okay";
};
--
2.44.0

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