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    SubjectRe: [PATCH v3 1/6] drm/msm/dpu: fix video mode DSC for DSI
    On Wed, 3 Apr 2024 at 12:11, Jun Nie <jun.nie@linaro.org> wrote:
    >
    > From: Jonathan Marek <jonathan@marek.ca>
    >
    > Add necessary DPU timing and control changes for DSC to work with DSI
    > video mode.
    >
    > Signed-off-by: Jonathan Marek <jonathan@marek.ca>
    > Signed-off-by: Jun Nie <jun.nie@linaro.org>
    > ---
    > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 9 +++++++++
    > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 8 ++++++++
    > 2 files changed, 17 insertions(+)
    >
    > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
    > index d9e7dbf0499c..c7b009a60b63 100644
    > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
    > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
    > @@ -115,6 +115,15 @@ static void drm_mode_to_intf_timing_params(
    > timing->h_front_porch = timing->h_front_porch >> 1;
    > timing->hsync_pulse_width = timing->hsync_pulse_width >> 1;
    > }
    > +
    > + /*
    > + * for DSI, if compression is enabled, then divide the horizonal active
    > + * timing parameters by compression ratio.
    > + */
    > + if (phys_enc->hw_intf->cap->type != INTF_DP && timing->compression_en) {
    > + timing->width = timing->width / 3; /* XXX: don't assume 3:1 compression ratio */
    > + timing->xres = timing->width;
    > + }
    > }
    >
    > static u32 get_horizontal_total(const struct dpu_hw_intf_timing_params *timing)
    > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
    > index 965692ef7892..079efb48db05 100644
    > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
    > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
    > @@ -167,6 +167,14 @@ static void dpu_hw_intf_setup_timing_engine(struct dpu_hw_intf *ctx,
    > intf_cfg2 |= INTF_CFG2_DATABUS_WIDEN;
    >
    > data_width = p->width;
    > + if (p->wide_bus_en && !dp_intf)
    > + data_width = p->width >> 1;

    How is wide_bus relevant to the DSC case?
    Is there a need for the Fixes tag?

    > +
    > + if (p->compression_en)
    > + intf_cfg2 |= INTF_CFG2_DCE_DATA_COMPRESS;
    > +
    > + if (p->compression_en && dp_intf)
    > + DPU_ERROR("missing adjustments for DSC+DP\n");
    >
    > hsync_data_start_x = hsync_start_x;
    > hsync_data_end_x = hsync_start_x + data_width - 1;
    >
    > --
    > 2.34.1
    >


    --
    With best wishes
    Dmitry

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