Messages in this thread | | | Date | Mon, 29 Apr 2024 17:23:23 -0400 | From | Frank Li <> | Subject | Re: [PATCH v3 10/11] dt-bindings: imx6q-pcie: Add i.MX8Q pcie compatible string |
| |
On Mon, Apr 29, 2024 at 10:48:23AM -0500, Rob Herring wrote: > On Tue, Apr 02, 2024 at 10:33:46AM -0400, Frank Li wrote: > > From: Richard Zhu <hongxing.zhu@nxp.com> > > > > Add i.MX8Q PCIe "fsl,imx8q-pcie" compatible strings. > > > > Add "fsl,local-address" property for i.MX8Q platforms. fsl,local-address > > is address of PCIe module in high speed io (HSIO)subsystem bus fabric. HSIO > > bus fabric convert the incoming address base to this local-address. Two > > instances of PCI have difference local address. > > This is just some intermediate bus address? We really should be able to > describe this with standard ranges properties.
Yes, Maybe dwc's implement have some problem. After read below doc again https://elinux.org/Device_Tree_Usage#PCI_Address_Translation
┌──────┐ ┌──────────┐ ┌────┐0x18001000 │ │ │ │ │CPU ├───────────►│ ├──┤ Others │ └────┘ │ │ │ │ │ │ └──────────┘ │ │ │ │ ┌─────────┐ │ │ │ │ ┌───────────┐ │ ├──►│ HSIO │ 0xB8001000 ├───────────┤ │ │ │ Fabric ├───────────►│Bar0 │ TLP mem 0xB8001000 │ │ │ │ │0xB8000000 ├───────► └──────┘ └─────────┘ │ │ Main Fabric ├───────────┤ │ │ │ │ │ │ │ │ │ │ │ │ │ DWC │ │ PCIe │ │ Controller│ │ │ │ │ └───────────┘
dts should be
ranges = <0x82000000 0 0xB8000000 0x18000000 0 0x07f00000> ^^^^
u64 imx_pcie_cpu_addr_fixup(struct dw_pcie *pcie, u64 cpu_addr) offset = entry->res->start; { ... return (cpu_addr - entry->offset); }
NVME can work. let me do more test.
Frank > > > > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> > > Signed-off-by: Frank Li <Frank.Li@nxp.com> > > --- > > .../devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml | 5 +++++ > > .../devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 18 ++++++++++++++++++ > > 2 files changed, 23 insertions(+)
| |