Messages in this thread | | | Date | Thu, 18 Apr 2024 11:53:31 +0200 | Subject | Re: [PATCH v2 2/7] soc: qcom: smem: Add a feature code getter | From | Konrad Dybcio <> |
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On 18.04.2024 1:39 AM, Dmitry Baryshkov wrote: > On Wed, Apr 17, 2024 at 10:02:54PM +0200, Konrad Dybcio wrote: >> Recent (SM8550+ ish) Qualcomm SoCs have a new mechanism for precisely >> identifying the specific SKU and the precise speed bin (in the general >> meaning of this word, anyway): a pair of values called Product Code >> and Feature Code. >> >> Based on this information, we can deduce the available frequencies for >> things such as Adreno. In the case of Adreno specifically, Pcode is >> useless for non-prototype SoCs. >> >> Introduce a getter for the feature code and export it. >> >> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> >> ---
[...]
>> +/* Internal feature codes */ >> +/* Valid values: 0 <= n <= 0xf */ >> +#define SOCINFO_FC_Yn(n) (0xf1 + n) >> +#define SOCINFO_FC_INT_MAX SOCINFO_FC_Yn(0x10) > > This is 0x101 rather than 0x100 or 0xff. Is that expected?
Yes, this is "the first invalid one", similar to ENUMNAME_NUM
> >> + >> +/* Product codes */ >> +#define SOCINFO_PC_UNKNOWN 0 >> +#define SOCINFO_PCn(n) (n + 1) >> +#define SOCINFO_PC_RESERVE (BIT(31) - 1) > > This patch works on fcodes, why do we have PCode defines here?
I decided they're useful to keep.. Didn't want to split them to a separate patch for no reason.
Konrad
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