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SubjectRe: [PATCH v3] dt-bindings: PCI: altera: Convert to YAML


On Sun, 14 Apr 2024, Krzysztof Kozlowski wrote:

> On 13/04/2024 19:26, matthew.gerlach@linux.intel.com wrote:
>> From: Matthew Gerlach <matthew.gerlach@linux.intel.com>
>>
>> Convert the device tree bindings for the Altera Root Port PCIe controller
>> from text to YAML.
>>
>> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
>
> ...
>
>> +allOf:
>> + - $ref: /schemas/pci/pci-host-bridge.yaml#
>> + - if:
>> + properties:
>> + compatible:
>> + enum:
>> + - altr,pcie-root-port-1.0
>> + then:
>> + properties:
>> + reg:
>> + items:
>> + - description: TX slave port region
>> + - description: Control register access region
>> +
>> + reg-names:
>> + items:
>> + - const: Txs
>> + - const: Cra
>> +
>> + else:
>> + properties:
>> + reg:
>> + items:
>> + - description: Hard IP region
>
> Why Hip is the first? Old binding suggested it to be the last entry. It
> would also make binding easier, as you describe reg and reg-names in
> top-level and just limit them with min/maxItems.
>
> Does anything depend on different order (Hip as first)?

I don't think the order really matters. So Hip could go last, and it makes
sense to only mention the reg/reg-names once in the top and then add
limits with min/maxItems in the allOf section.

Thanks for the feedback,
Matthew Gerlach

>
>> + - description: TX slave port region
>> + - description: Control register access region
>> +
>> + reg-names:
>> + items:
>> + - const: Hip
>> + - const: Txs
>> + - const: Cra
>> +
>
>
> Best regards,
> Krzysztof
>
>

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