Messages in this thread | | | From | Huacai Chen <> | Date | Sat, 13 Apr 2024 15:22:55 +0800 | Subject | Re: [PATCH v3 3/4] LoongArch: Save and restore PERCPU_BASE_KS for ACPI S3 state |
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On Fri, Apr 12, 2024 at 5:30 PM Tiezhu Yang <yangtiezhu@loongson.cn> wrote: > > > > On 04/12/2024 12:18 PM, Huacai Chen wrote: > > Hi, Tiezhu, > > > > On Thu, Apr 11, 2024 at 9:05 AM Tiezhu Yang <yangtiezhu@loongson.cn> wrote: > >> > >> Currently, per_cpu_offset(x) is defined as __per_cpu_offset[x]) > >> only under CONFIG_SMP in include/asm-generic/percpu.h, that is > >> to say, the implementation of loongarch_common_resume() which > >> calls per_cpu_offset(0) is not suitable for the case of non-SMP, > >> so do not write per_cpu_offset(0) to PERCPU_BASE_KS when resume, > >> just save the value of PERCPU_BASE_KS when suspend and restore > >> it when resume to make it work well for both SMP and non-SMP. > > For non-SMP you need PERCPU_BASE_KS to do what? > > The initial aim is to avoid build error under !CONFIG_SMP > and it works well on both !CONFIG_SMP and CONFIG_SMP, the > changes are similar with the code in hibernate.c. > > An alternative way is to do the following simple change, > but it seems a little ugly due to the ifdef, let me know > what is your preference. Add "u64 pcpu_base" at the last of saved_registers is better than this patch, and can avoid ifdef.
Huacai
> > diff --git a/arch/loongarch/power/suspend.c b/arch/loongarch/power/suspend.c > index 166d9e06a64b..35191afefcda 100644 > --- a/arch/loongarch/power/suspend.c > +++ b/arch/loongarch/power/suspend.c > @@ -44,7 +44,9 @@ void loongarch_common_resume(void) > { > sync_counter(); > local_flush_tlb_all(); > +#ifdef > csr_write64(per_cpu_offset(0), PERCPU_BASE_KS); > +#endif > csr_write64(eentry, LOONGARCH_CSR_EENTRY); > csr_write64(eentry, LOONGARCH_CSR_MERRENTRY); > csr_write64(tlbrentry, LOONGARCH_CSR_TLBRENTRY); > > Thanks, > Tiezhu > >
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