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SubjectRe: [PATCH v2 09/12] iommu/vt-d: Use cache helpers in arch_invalidate_secondary_tlbs
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On 2024/4/10 23:55, Jason Gunthorpe wrote:
> On Wed, Apr 10, 2024 at 10:08:41AM +0800, Lu Baolu wrote:
>> /* Pages have been freed at this point */
>> static void intel_arch_invalidate_secondary_tlbs(struct mmu_notifier *mn,
>> struct mm_struct *mm,
>> unsigned long start, unsigned long end)
>> {
>> struct intel_svm *svm = container_of(mn, struct intel_svm, notifier);
>> + struct dmar_domain *domain = svm->domain;
>>
>> if (start == 0 && end == -1UL) {
>
> ULONG_MAX ideally.

Done.

>
>> - intel_flush_svm_all(svm);
>> + cache_tag_flush_all(domain);
>> return;
>> }
>>
>> - intel_flush_svm_range(svm, start,
>> - (end - start + PAGE_SIZE - 1) >> VTD_PAGE_SHIFT, 0);
>> + cache_tag_flush_range(domain, start, end, 0);
>
> Be mindful of the note from the ARM driver:
>
> /*
> * The mm_types defines vm_end as the first byte after the end address,
> * different from IOMMU subsystem using the last address of an address
> * range. So do a simple translation here by calculating size correctly.
> */
> size = end - start;

I didn't find any documentation about the @end in this callback, but in
mm subsystem, it does like this,

flush_tlb_mm_range(mm, va, va + nr_pages * PAGE_SIZE, PAGE_SHIFT, false);

So, yes, the @end in arch_invalidate_secondary_tlbs callback is
different from the iommu gather.

I was not aware of this. Thanks for pointing this out.

>
> Given that the cache_tag_flush_range's are all tied directly to the
> iommu gather API, this is probably missing a -1 though perhaps it does
> not cause a functional problem here.

I will change it like below,

diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c
index 858a64fbdaab..15dcd1b30df1 100644
--- a/drivers/iommu/intel/svm.c
+++ b/drivers/iommu/intel/svm.c
@@ -146,7 +146,12 @@ static void
intel_arch_invalidate_secondary_tlbs(struct mmu_notifier *mn,
return;
}

- cache_tag_flush_range(domain, start, end, 0);
+ /*
+ * The mm_types defines vm_end as the first byte after the end
address,
+ * different from IOMMU subsystem using the last address of an
address
+ * range.
+ */
+ cache_tag_flush_range(domain, start, end - 1, 0);
}

static void intel_mm_release(struct mmu_notifier *mn, struct mm_struct
*mm)
Best regards,
baolu


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