lkml.org 
[lkml]   [2024]   [Apr]   [1]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH RFC cmpxchg 8/8] riscv: Emulate one-byte and two-byte cmpxchg
    Date
    Use the new cmpxchg_emu_u8() and cmpxchg_emu_u16() to emulate one-byte
    and two-byte cmpxchg() on riscv.

    [ paulmck: Apply kernel test robot feedback. ]

    Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
    Cc: Andi Shyti <andi.shyti@linux.intel.com>
    Cc: Andrzej Hajda <andrzej.hajda@intel.com>
    Cc: <linux-riscv@lists.infradead.org>
    ---
    arch/riscv/Kconfig | 1 +
    arch/riscv/include/asm/cmpxchg.h | 25 +++++++++++++++++++++++++
    2 files changed, 26 insertions(+)

    diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
    index be09c8836d56b..4eaf40d0a52ec 100644
    --- a/arch/riscv/Kconfig
    +++ b/arch/riscv/Kconfig
    @@ -44,6 +44,7 @@ config RISCV
    select ARCH_HAS_UBSAN
    select ARCH_HAS_VDSO_DATA
    select ARCH_KEEP_MEMBLOCK if ACPI
    + select ARCH_NEED_CMPXCHG_1_2_EMU
    select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
    select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT
    select ARCH_STACKWALK
    diff --git a/arch/riscv/include/asm/cmpxchg.h b/arch/riscv/include/asm/cmpxchg.h
    index 2fee65cc84432..a5b377481785c 100644
    --- a/arch/riscv/include/asm/cmpxchg.h
    +++ b/arch/riscv/include/asm/cmpxchg.h
    @@ -9,6 +9,7 @@
    #include <linux/bug.h>

    #include <asm/fence.h>
    +#include <linux/cmpxchg-emu.h>

    #define __xchg_relaxed(ptr, new, size) \
    ({ \
    @@ -170,6 +171,12 @@
    __typeof__(*(ptr)) __ret; \
    register unsigned int __rc; \
    switch (size) { \
    + case 1: \
    + __ret = cmpxchg_emu_u8((volatile u8 *)__ptr, __old, __new); \
    + break; \
    + case 2: \
    + break; \
    + __ret = cmpxchg_emu_u16((volatile u16 *)__ptr, __old, __new); \
    case 4: \
    __asm__ __volatile__ ( \
    "0: lr.w %0, %2\n" \
    @@ -214,6 +221,12 @@
    __typeof__(*(ptr)) __ret; \
    register unsigned int __rc; \
    switch (size) { \
    + case 1: \
    + __ret = cmpxchg_emu_u8((volatile u8 *)__ptr, __old, __new); \
    + break; \
    + case 2: \
    + break; \
    + __ret = cmpxchg_emu_u16((volatile u16 *)__ptr, __old, __new); \
    case 4: \
    __asm__ __volatile__ ( \
    "0: lr.w %0, %2\n" \
    @@ -260,6 +273,12 @@
    __typeof__(*(ptr)) __ret; \
    register unsigned int __rc; \
    switch (size) { \
    + case 1: \
    + __ret = cmpxchg_emu_u8((volatile u8 *)__ptr, __old, __new); \
    + break; \
    + case 2: \
    + break; \
    + __ret = cmpxchg_emu_u16((volatile u16 *)__ptr, __old, __new); \
    case 4: \
    __asm__ __volatile__ ( \
    RISCV_RELEASE_BARRIER \
    @@ -306,6 +325,12 @@
    __typeof__(*(ptr)) __ret; \
    register unsigned int __rc; \
    switch (size) { \
    + case 1: \
    + __ret = cmpxchg_emu_u8((volatile u8 *)__ptr, __old, __new); \
    + break; \
    + case 2: \
    + break; \
    + __ret = cmpxchg_emu_u16((volatile u16 *)__ptr, __old, __new); \
    case 4: \
    __asm__ __volatile__ ( \
    "0: lr.w %0, %2\n" \
    --
    2.40.1

    \
     
     \ /
      Last update: 2024-05-27 16:18    [W:3.848 / U:0.020 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site