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SubjectRe: [PATCH v1 3/6] dt-bindings: clock: meson: a1: peripherals: support sys_pll_div16 input
On Fri, Mar 29, 2024 at 11:58:43PM +0300, Dmitry Rokosov wrote:
> The 'sys_pll_div16' input clock is used as one of the sources for the
> GEN clock.
>
> Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
> ---
> .../bindings/clock/amlogic,a1-peripherals-clkc.yaml | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/clock/amlogic,a1-peripherals-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,a1-peripherals-clkc.yaml
> index 6d84cee1bd75..f6668991ff1f 100644
> --- a/Documentation/devicetree/bindings/clock/amlogic,a1-peripherals-clkc.yaml
> +++ b/Documentation/devicetree/bindings/clock/amlogic,a1-peripherals-clkc.yaml
> @@ -29,6 +29,7 @@ properties:
> - description: input fixed pll div5
> - description: input fixed pll div7
> - description: input hifi pll
> + - description: input sys pll div16
> - description: input oscillator (usually at 24MHz)
>
> clock-names:
> @@ -38,6 +39,7 @@ properties:
> - const: fclk_div5
> - const: fclk_div7
> - const: hifi_pll
> + - const: sys_pll_div16
> - const: xtal

And adding an entry in the middle is also an ABI break. New entries go
on the end (and should be optional).

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