Messages in this thread | ![/](/images/icornerl.gif) | | Date | Tue, 9 Jan 2024 11:17:30 +0100 | Subject | Re: [PATCH 1/1] arm64: dts: qcom: ipq6018: enable sdhci node | From | Robert Marko <> |
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On 07. 01. 2024. 13:28, Chukun Pan wrote: > Enable mmc device found on ipq6018 devices. > This node supports both eMMC and SD cards. > > Tested with: > eMMC (HS200) > SD Card (SDR50/SDR104) > > Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> L2 LDO should be used as VQMMC supply, otherwise you cannot change between 3 and 1.8V.
Regards, Robert > --- > arch/arm64/boot/dts/qcom/ipq6018.dtsi | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi > index 5e1277fea725..39fb38914a1e 100644 > --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi > +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi > @@ -436,6 +436,28 @@ dwc_1: usb@7000000 { > }; > }; > > + sdhc: mmc@7804000 { > + compatible = "qcom,ipq6018-sdhci", "qcom,sdhci-msm-v5"; > + reg = <0x0 0x7804000 0x0 0x1000>, > + <0x0 0x7805000 0x0 0x1000>; > + reg-names = "hc", "cqhci"; > + > + interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "hc_irq", "pwr_irq"; > + > + clocks = <&gcc GCC_SDCC1_AHB_CLK>, > + <&gcc GCC_SDCC1_APPS_CLK>, > + <&xo>; > + clock-names = "iface", "core", "xo"; > + resets = <&gcc GCC_SDCC1_BCR>; > + max-frequency = <192000000>; > + mmc-ddr-1_8v; > + mmc-hs200-1_8v; > + > + status = "disabled"; > + }; > + > blsp_dma: dma-controller@7884000 { > compatible = "qcom,bam-v1.7.0"; > reg = <0x0 0x07884000 0x0 0x2b000>;
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