Messages in this thread | | | Date | Wed, 24 Jan 2024 17:36:10 +0300 | From | Serge Semin <> | Subject | Re: [PATCH net] net: stmmac: xgmac: fix handling of DPP safety error for DMA channels |
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On Tue, Jan 23, 2024 at 05:50:06PM +0800, Furong Xu wrote: > Commit 56e58d6c8a56 ("net: stmmac: Implement Safety Features in > XGMAC core") checks and reports safety errors, but leaves the > Data Path Parity Errors for each channel in DMA unhandled at all, lead to > a storm of interrupt. > Fix it by checking and clearing the DMA_DPP_Interrupt_Status register. > > Fixes: 56e58d6c8a56 ("net: stmmac: Implement Safety Features in XGMAC core") > Signed-off-by: Furong Xu <0x1207@gmail.com> > --- > drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h | 1 + > drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c | 6 ++++++ > 2 files changed, 7 insertions(+) > > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h > index 207ff1799f2c..188e11683136 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h > +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h > @@ -385,6 +385,7 @@ > #define XGMAC_DCEIE BIT(1) > #define XGMAC_TCEIE BIT(0) > #define XGMAC_DMA_ECC_INT_STATUS 0x0000306c > +#define XGMAC_DMA_DPP_INT_STATUS 0x00003074 > #define XGMAC_DMA_CH_CONTROL(x) (0x00003100 + (0x80 * (x))) > #define XGMAC_SPH BIT(24) > #define XGMAC_PBLx8 BIT(16) > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c > index eb48211d9b0e..874e85b499e2 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c > +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c > @@ -745,6 +745,12 @@ static void dwxgmac3_handle_mac_err(struct net_device *ndev, > > dwxgmac3_log_error(ndev, value, correctable, "MAC", > dwxgmac3_mac_errors, STAT_OFF(mac_errors), stats); > + > + value = readl(ioaddr + XGMAC_DMA_DPP_INT_STATUS); > + writel(value, ioaddr + XGMAC_DMA_DPP_INT_STATUS); > + > + if (value) > + netdev_err(ndev, "Found DMA_DPP error, status: 0x%x\n", value);
1. Why not to implement this in the same way as the rest of the safety errors handle code? (with the flags described by the dwxgmac3_error_desc-based table and the respective counters being incremented should the errors were detected)
2. I don't see this IRQ being enabled in the dwxgmac3_safety_feat_config() method. How come the respective event has turned to be triggered anyway?
-Serge(y)
> } > > static const struct dwxgmac3_error_desc dwxgmac3_mtl_errors[32]= { > -- > 2.34.1 > >
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