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SubjectRe: [EXT] Re: [RFC 00/12] ARM: MPAM: add support for priority partitioning control
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Hi Tony,

On 1/11/2024 3:14 PM, Luck, Tony wrote:
>>> I'm not sure having multiple lines for the same resource makes anything
>>> clearer. I preferred one of the earlier proposals like this one:
>>>
>>> L3:0=XXXX,PPART=X,CCAP=X;1=YYYY,CCAP=Y
>>
>> This assumes that all tools (public and private) that currently parse the schemata
>> file will be able to handle this additional information seamlessly.
>
> Reinette,
>
> Yes. If there are tools that *read* schemata files, they will be surprised by this extra information.
>
> But that also applies if the "extra" information is moved to a second line that also begins with "L3:".
>
> Tools that *write* schemata files should be OK as long as the kernel will still accept:
>
> # echo "L3:1=fff" > schemata
>
> E.g. the Linux selftests in tools/testing/selftests/resctrl/ should still run without
> any modification.
>
> The "separate line" option could work if the prefix isn't "L3:". E.g.
>
> L3:0=XXXX;1=YYYY
> L3PPART:0=X
> L3CCAP:0=X;1=Y
>
> If these options are asymmetrically available on cache instances, these extra
> lines won't have every L3 cache instance listed.

I think we are going in circles here. I shared my concern about user space
breakage a while ago [1] in response to your previous proposal and this new proposal
seems to match where this thread ended [2] last year.

Reinette

[1] https://lore.kernel.org/lkml/be51596e-2e62-2fb9-4176-b0b2a2abb1d3@intel.com/
[2] https://lore.kernel.org/lkml/20230901160451.00001f75@Huawei.com/

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