Messages in this thread | ![/](/images/icornerl.gif) | | Date | Wed, 10 Jan 2024 20:23:58 +0200 | From | Vladimir Oltean <> | Subject | Re: [PATCH net-next 07/15] net: dsa: mt7530: do not run mt7530_setup_port5() if port 5 is disabled |
| |
On Wed, Jan 10, 2024 at 10:26:54AM +0300, Arınç ÜNAL wrote: > > Are there existing systems that use PHY muxing? The possible problem I > > see is breaking those boards which have a phy-handle on gmac5, if the > > mt7530 driver is no longer going to modify its HWTRAP register. > > Ah see, for PHY muxing, the driver actually wants the phy-handle to be put > on the SoC MAC, and the PHY to be defined on the SoC ethernet's MDIO bus. > We don't even define gmac5 as a port on the switch dt-bindings.
I noticed that from the code already. Maybe I shouldn't have said "gmac5" when I meant "the GMAC attached to switch port 5, aka GMAC0". I was under the impression that you were also using this slightly incorrect terminology, to keep a numerical association between the CPU port number and its directly attached GMAC.
> While none of the DTs on the Linux repository utilise this, some of the > mt7621 DTs on OpenWrt do. The change in behaviour will only be that phy0/4 > will be inaccessible from the SoC MAC's network interface. I de-facto > maintain the mt7621 device tree source files there. I intend to revert it > along with adding port 5 as a CPU port so that the conduit changing feature > becomes available.
If OpenWrt kernels are always shipped in tandem with updated device trees (i.e. no Arm SystemReady IR platforms, where the DT is provided by U-Boot), I won't oppose to retracting features described via DT if their platform maintainers agree in a wide enough circle that the breakage is manageable.
BTW, besides OpenWrt, what other software is deployed on these SoCs typically?
| ![\](/images/icornerr.gif) |