Messages in this thread | ![/](/images/icornerl.gif) | | Date | Fri, 2 Jun 2023 12:08:04 +0100 | From | "Russell King (Oracle)" <> | Subject | Re: [PATCH net-next v6 1/1] net: dsa: mv88e6xxx: implement USXGMII mode for mv88e6393x |
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On Thu, Jun 01, 2023 at 05:17:04PM -0700, msmulski2@gmail.com wrote: > +static int mv88e639x_serdes_pcs_get_state_usxgmii(struct mv88e6xxx_chip *chip, > + int port, int lane, > + struct phylink_link_state *state) > +{ > + u16 status, lp_status; > + int err; > + > + err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS, > + MV88E6390_USXGMII_PHY_STATUS, &status); > + if (err) { > + dev_err(chip->dev, "can't read Serdes USXGMII PHY status: %d\n", err); > + return err; > + } > + dev_dbg(chip->dev, "USXGMII PHY status: 0x%x\n", status); > + > + state->link = !!(status & MDIO_USXGMII_LINK);
Another thing which is missing is filling in state->an_complete. Does the PHY have a status bit for this when operating in USXGMII mode? If not, please set it to state->link.
Thanks.
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