Messages in this thread Patch in this message | | | From | Komal Bajaj <> | Subject | [PATCH v4 3/4] arm64: dts: qcom: qdu1000: Add SDHCI pin configuration to DTSI | Date | Thu, 1 Jun 2023 12:28:04 +0530 |
| |
Add required pins for SDHCI, so that the interface can work reliably.
Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> --- arch/arm64/boot/dts/qcom/qdu1000.dtsi | 50 +++++++++++++++++++++++++++ 1 file changed, 50 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi index 6df07334f1d3..9f615f3368c2 100644 --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi @@ -1147,6 +1147,56 @@ pins = "gpio31"; function = "gpio"; }; + + sdc_on_state: sdc-on-state { + clk-pins { + pins = "sdc1_clk"; + drive-strength = <16>; + bias-disable; + }; + + cmd-pins { + pins = "sdc1_cmd"; + drive-strength = <10>; + bias-pull-up; + }; + + data-pins { + pins = "sdc1_data"; + drive-strength = <10>; + bias-pull-up; + }; + + rclk-pins { + pins = "sdc1_rclk"; + bias-pull-down; + }; + }; + + sdc_off_state: sdc-off-state { + clk-pins { + pins = "sdc1_clk"; + drive-strength = <2>; + bias-disable; + }; + + cmd-pins { + pins = "sdc1_cmd"; + drive-strength = <2>; + bias-pull-up; + }; + + data-pins { + pins = "sdc1_data"; + drive-strength = <2>; + bias-pull-up; + }; + + rclk-pins { + pins = "sdc1_rclk"; + bias-pull-down; + }; + }; };
apps_smmu: iommu@15000000 { -- 2.17.1
| |