Messages in this thread | | | Date | Mon, 6 Mar 2023 09:36:26 -0800 | From | Jacob Pan <> | Subject | Re: [PATCH 1/4] iommu/vt-d: Implement set device pasid op for default domain |
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Hi Jason,
On Mon, 6 Mar 2023 08:57:57 -0400, Jason Gunthorpe <jgg@nvidia.com> wrote:
> On Wed, Mar 01, 2023 at 04:59:56PM -0800, Jacob Pan wrote: > > On VT-d platforms, legacy DMA requests without PASID use device’s > > default domain, where RID_PASID is always attached. Device drivers > > can then use the DMA API for all in-kernel DMA on the RID. > > > > Ideally, devices capable of using ENQCMDS can also transparently use the > > default domain, consequently DMA API. However, VT-d architecture > > dictates that the PASID used by ENQCMDS must be different from the > > RID_PASID value. > > > > To provide support for transparent use of DMA API with non-RID_PASID > > value, this patch implements the set_dev_pasid() function for the > > default domain. The idea is that device drivers wishing to use ENQCMDS > > to submit work on buffers mapped by DMA API will call > > iommu_attach_device_pasid() beforehand. > > > > Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> > > --- > > drivers/iommu/intel/iommu.c | 32 ++++++++++++++++++++++++++++++++ > > 1 file changed, 32 insertions(+) > > > > diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c > > index 10f657828d3a..a0cb3bc851ac 100644 > > --- a/drivers/iommu/intel/iommu.c > > +++ b/drivers/iommu/intel/iommu.c > > @@ -4665,6 +4665,10 @@ static void intel_iommu_remove_dev_pasid(struct > > device *dev, ioasid_t pasid) case IOMMU_DOMAIN_SVA: > > intel_svm_remove_dev_pasid(dev, pasid); > > break; > > + case IOMMU_DOMAIN_DMA: > > + case IOMMU_DOMAIN_DMA_FQ: > > + case IOMMU_DOMAIN_IDENTITY: > > Why do we need this switch statement anyhow? For DMA API pasid, there is nothing special just let it fall through and call intel_pasid_tear_down_entry(iommu, dev, pasid, false);
> Something seems to have > gone wrong here.. SVM shouldn't be special, I think all the trouble is caused by the asymmetrical setup of iommu_op.remove_dev_pasid() and iommu_domain_ops.set_dev_pasid() Perhaps, we should "demote" remove_dev_pasid to iommu_domain_ops then we don't have to check SVA specific things.
> and why does this call intel_pasid_tear_down_entry() twice on the SVA > path? Good catch, that seems to be unnecessary.
> It seems like all this is doing is flushing the PRI queue. > A domain should have a dedicated flag unrelated to the type if it is > using PRI and all PRI using domains should have the PRI queue flushed > here, using the same code as flushing the PRI for a RID attachment. Yes, or if the teardown op is domain-specific, then it works too?
Thanks,
Jacob
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